GB7200 multi-port Layer 2 Ethernet switching chip

date：2024-05-27 / popularity： / source：

Overview

The GB7200 is a multi-port Layer 2 Ethernet switching chip independently developed and designed by Guoban Semiconductor. It integrates a high-performance RISC-V processor, 8-port 10M/100M/1000M PHYs and 6 flexible multi-rate SerDes lanes supporting 1G/2.5G/5G/10G/10.3125G. The chip supports external processors and provides RGMII/IIC/SPI/MIIM interfaces for configuring and managing the switching chip and peripheral systems.

Basic Features

Compliant with IEEE 802.3: 1000BASE-T, 100BASE-TX, 10BASE-T
Integrated 8-port 10M/100M/1000M auto-negotiation PHY
Equipped with 6 flexible SerDes interfaces supporting 1G/2.5G/5G/10G/10.3125G multi-rate operation
Supports external management CPUs, and also works with the internal integrated RISC-V processor
Up to 6.144 Mb packet buffer capacity
Typical power consumption: 4 W
Package: LQFP216, 24 × 24 mm

Functional Features

single-core RISC-V processor at 300 MHz
1 × RGMII interface, supports external CPU connection via RGMII
6 flexible SerDes lanes:HSS0~HSS3: support QSGMII / HSGMII / 2500BASE-X / SGMII / 1000BASE-X modes;HSS4~HSS5: support full-rate multi-protocol modes (complement standard interface list formally)
Integrated 8-channel 10/100/1000BASE-T interfaces
Maximum 32 physical ports (including CPU management port)
Dual-chip stacking supported
MAC table entries: 8K
Routing entries: 512
ACL: 512 total / 4 blocks × 128 entries @ 216 bit
Multicast groups: 512
VLAN: 4K
STP instances: 64
VLAN translation entries: 256
Port mirroring: 4 groups
VLAN isolation groups: 16
Metering & policing resources:ACL meter: 128；Ingress rate limit: 32；Egress rate limit: 32Egress port queue: 32 × 2 × 8；Storm control: 32 × 3
Trunk: 8 groups, up to 8 members per group
Ports & Queues: Max 32 ports (including CPU port), 8 queues per port
Buffer: 6.144 Mbit

Typical Applications